The USB specification is intended to facilitate the interoperation of devices from different vendors in an open architecture. USB data is encoded using differential signalling (viz. two wires transfer the information) in the form of the difference between the signal levels of those two wires. The USB specification is intended as an enhancement to the PC architecture, spanning portable, desktop and home environments.
The USB specification assumes that devices differ. This is true for the intended environments in which devices from a multiplicity of manufacturers are connected, but there exist other environments (such as certain common industrial or laboratory environments) that require a specification for operating multiple devices of a similar nature in a synchronized manner. The specification does not sufficiently address this issue. Such environments are typically those where testing, measuring or monitoring is performed, and which require the devices to be synchronized to a more accurate degree than is specified. The USB specification allows limited inter-device synchronization by providing a 1 kHz clock signal to all devices. However, many laboratory and industrial environments require synchronization at megahertz frequencies and higher.
USB employs a tiered star topology, where hubs provide attachment points for USB devices. The USB host controller which is located on the user's personal computer (PC), laptop or personal digital assistant (PDA) contains the root hub, which is the origin of all USB ports in the system. The root hub provides a number of USB ports to which USB functional devices or additional hubs may be attached.
In turn, one can attach more hubs (such as USB composite devices) to any of these ports, which then provide additional attachment points via ports for further USB devices. In this way, USB allows a maximum of 127 devices (including hubs) to be connected, with the restriction that any device may be at most five levels deep.
The root hub in the host transmits a Start of Frame (SOF) signal packet every 1 ms to every device, the time between two SOF packets being termed a frame. Each module receives this SOF packet at a different time, owing to electrical delays inherent in the USB topology, which means that there may be a significant time delay (specified as ≦380 ns) between the receipt of a signal at a device connected directly to the host controller and at a device that is five levels down. This is a severe restriction when it is desired to synchronize devices at megahertz levels and above. Furthermore the USB specification allows the host controller to fail to transmit up to five consecutive SOF tokens.
Current synchronization between a USB host and a USB device is possible by two types of USB transfers, Interrupt and Isochronous. Interrupt transfers allow guaranteed polling frequencies of devices with minimum periods of 125 μs, whereas isochronous transfers guarantee a constant transfer rate. Both methods require there to be traffic between the device and host for synchronization to take place and therefore reserve more bandwidth for higher degrees of synchronization. This unfortunately means that the available USB bandwidth can be used up before the maximum number of devices has been connected. This approach also places on the host the great computational burden of keeping 127 devices synchronized to the host by means of software, yet still fails to address maintaining synchrony between the devices as to the host the individual devices represent separate processes.
Devices that contain a physical transducer of some kind, such as a laser diode or a photodetector, may require clock and trigger information. A device such as a laser diode with a modulated light output at 1 MHz may use a clock signal to perform transducer functions at regular intervals or at a constant frequency. A trigger signal is usually used to start or end an operation at a set time. In the laser diode example, a trigger signal could be used to turn the modulated light output on or off.
These clock and trigger signals can be used to synchronize a multiplicity of devices to each other (and hence constitute what is referred to below as “synchronization information”), provided that the signals are common and simultaneous to all devices. ‘Common’ and ‘simultaneous’ here mean that the variation in time of these signals between the devices is less than a specified quantity, δt. In the laser diode example, this would enable a multiplicity of laser diodes to modulate their light output at one frequency. The modulation frequency of all devices would be the same, and their waveforms would be in-phase. The current USB specification (viz. 2.0) allows for a δt of up to 0.35 μs. For a signal with a frequency of 1 MHz and a period of 1.0 μs, this delay represents almost half of the period. It is thus unusable as synchronization information for routine use.
Devices such as hubs and USB controller chips commonly use some amount of phase locking in order to decode the USB protocol. It is the purpose of the SYNC pattern in the USB protocol to provide a synchronization pattern for another electronic circuit to lock to. However, this is intended to synchronize the device to the USB bit streams to an accuracy sufficient to interpret MHz bit streams. It is not intended to synchronize two separate devices to each other to the level required by many test and measurement instruments. The USB specification—to the extent that it deals with inter-device synchronization—is mainly concerned with synchronizing a USB-CD audio stream sufficiently for output on a USB-speaker pair. The requirements of such an arrangement are in the kHz range and, for this application, the USB specification is satisfactory. However, the specification does not address the potential problems of synchronizing, for example, 100 USB-speaker pairs.
As discussed above, USB communication transfers data during regular 1 ms frames (or, in the case of the High-Speed USB specification, in eight micro-frames per 1 ms frame). A Start of Frame (SOF) packet is transmitted to all but Low-Speed devices at the beginning of each frame and to all High-Speed devices at the beginning of each micro-frame. The SOF packet therefore represents a periodic low resolution signal broadcast to all but Low-Speed devices connected to a given Host Controller.
This SOF packet broadcast occurs at a nominal frequency of 1 kHz (in the case of the High-Speed USB specification, 8 kHz). However the USB specification allows a very large frequency tolerance (by instrumentation standards) of some 500 parts per million. The background art utilises this low resolution frequency signal that is broadcast to each of the devices to provide clock synchronization, but only to the somewhat ambiguous frequency provided by the USB Host Controller.
U.S. Pat. No. 6,343,364 (Leydier et al.) discloses an example of frequency locking to USB traffic, which is directed toward a smart card reader. This document teaches a local, free-running clock that is compared to USB SYNC and packet ID streams; its period is updated to match this frequency, resulting in a local clock with a nominal frequency of 1.5 MHz. This provides a degree of synchronization sufficient to read smart card information into a host PC but, as this approach is directed to a smart card reader, inter-device synchronization is not addressed.
U.S. Pat. No. 6,012,115 and subsequent continuation U.S. Pat. No. 6,226,701 (Chambers et al.) address the USB SOF periodicity and numbering for timing. These documents disclose a computer system that can perform an accurate determination of the moment in time a predetermined event occurred within a real-time peripheral device by using the start of frame pulse transmitted from a USB host controller to peripheral devices connected to it.
However the methods taught by these documents do not involve the measurement of the frequency of a periodic data structure contained within the USB data traffic for determination of the absolute frequency of the master clock in the USB Host Controller, and in some cases rely on the provision of an additional counter in the host.
U.S. Pat. No. 6,092,210 (Larky et al.) discloses a method for connecting two USB hosts for the purpose of data transfer, by employing a USB-to-USB connecting device for synchronizing local device clocks to the data streams of both USB hosts. Phase locked loops are used to synchronize local clocks and over-sampling is used to ensure that data loss does not occur. This document, however, relates to the synchronization of the data streams of two USB hosts with each other (and with limited accuracy) such that transfer of information is then possible between said Hosts. This document does not teach any method for synchronizing a plurality of USB devices to a single USB Host or to a plurality of USB hosts.
The USB specification was written with audio applications in mind, and U.S. Pat. No. 5,761,537 (Sturges et al.) describes how to synchronize two or more pairs of speakers with individual clocks, where one pair operates off a stereo audio circuit in the PC and the other pair is controlled by the USB. Both speaker pairs use their own clocks, so they need to be synchronized so this document teaches one technique for maintaining synchronization of the audio signals despite possible clock skew between the asynchronous clocks.
U.S. patent application Ser. No. 10/620,769 (Foster et al.) discloses a synchronized version of the USB, in which the local clock of each device is synchronized on a given USB to an arbitrary degree. This document also discloses a method and apparatus for providing a trigger signal to each device within the USB such that an event may be synchronously initiated on multiple devices by the trigger signal.
FIG. 1 is a schematic diagram of an exemplary background art synchronized USB device 10, connected to a digital USB 12, via a USB bus connector 14. USB device 10 contains an integrated USB interface and microcontroller 16, USB device function circuitry (such as a digitally controlled transducer) 18, bus sampling circuitry 20, digital I/O bus decoding circuitry 22, synchronization phase comparator 24 and synchronised clock 26.
USB device 10 is connected by bus connector 14 to digital USB 12. Digital USB 12 contains USB data and control signals for the USB device 10; bus sampling circuitry 20 observes the internal USB traffic 30 and generates a replica 32 thereof. Digital I/O bus decoding circuitry 22 decodes clock carrier signal 34 from signal 32. Synchronization phase comparator 24 compares decoded clock carrier 34 with divided clock signal 36 from synchronized clock 26 such that the output local clock signal 28 (at a substantially higher frequency than carrier signal 34) is locked to carrier signal 34 in frequency and phase.
In this arrangement, synchronization is achieved by detecting and extracting information from USB 12 as USB signal traffic enters USB device 10 and by generating local clock signal 28.
This architecture for synchronization of the local clock on each of a plurality of USB devices employs periodic data structures present in the USB traffic. An embodiment disclosed in U.S. application Ser. No. 10/620,769 essentially locks the local clock in frequency and phase to the detection of a SOF packet token at the USB device. Circuitry is employed to observe traffic through the USB and decode a clock carrier signal from bus traffic (in one embodiment, SOF packets), which results in a nominal carrier signal frequency of 1 kHz (or 8 kHz for USB High Speed). The local clock signal from a controlled oscillator clock is locked to the reception of the USB SOF packet in both phase and frequency. This ensures that all devices attached to the root hub are locked in frequency to the point at which they receive the SOF packet token. However, the approach described in U.S. application Ser. No. 10/620,769 is limited in its ability to provide a precisely known clock frequency to each device.
Further, although this disclosure teaches the highly accurate clock synchronization of devices attached to a USB, the disclosed approach employs a precision controlled oscillator, typically in the form of a voltage controlled voltage oscillator, and particular care must be taken to provide stable supply voltages. A closed loop control circuit is then applied to the precision oscillator. This adds both cost and complexity to the design of a synchronized USB device.
Another synchronized USB device, disclosed in International Patent Application No. PCT/AU2007/000155 filed 15 Feb. 2007 (Foster et al.), is shown schematically in FIG. 2. The technique of this disclosure allows the generation of accurate clock frequencies on board the USB device regardless of the accuracy of the clock in the Host PC. Referring to FIG. 2, USB device 40 includes a bus connector 44, bus interface circuitry 46, a microcontroller 48, USB device function circuitry (such as a digitally controlled transducer) 50 and synchronization circuitry in the form of synchronizer 52 (comparable to digital I/O bus decoding circuitry 22, synchronization phase comparator 24 and synchronised clock 26 of FIG. 1). Bus interface circuitry 46 acts as a transceiver for USB data detected at bus connector 44, passing the USB data to microcontroller 48. USB device 40 also includes circuitry 54 that observes the internal bus link and passes a replica 56 of USB traffic 58 to synchronizer 52. Microcontroller 48 provides information 60 to synchronizer 52 for accurate frequency synthesis of clock signal 62. Microcontroller 48 communicates with device function circuitry 50 through communication bus 64.
The carrier signal, once decoded from the USB traffic, is combined with a scaling factor to generate synchronization information and hence to synthesize a local clock signal with precise control of the clock frequency. In this way, the frequency of the local clock signal can be more accurate than the somewhat ambiguous frequency of the carrier signal by the use of additional information signal 60 from microcontroller 48.
This arrangement is said to be able to produce a local clock signal to arbitrarily high frequencies, such as a clock frequency of tens of megahertz, and thus to ensure that the local clock of each device connected to a given USB is synchronized in frequency. U.S. application Ser. No. 10/620,769 also teaches a method and apparatus to further synchronize multiple local clocks in phase by measurement of signal propagation time from the host to each device and provision of clock phase compensation on each of the USB devices.
While such synchronous USB systems can perform accurate clock synchronisation between USB devices with accurate clock frequency generation, they require special hardware components to decode data present on the USB and precision determination of the moment in time of carrier signal reception. These components are required in addition to the normal USB bus interface circuitry and microcontroller (46 and 48 respectively of FIG. 2) so these approaches are not compatible with a generic implementation of USB using off the shelf USB interface microcontrollers.
Additionally, the USB specification constraints the level of capacitance that the USB device can present to the bus. The effective capacitance of USB each data line to ground in the presence of the parallel effective resistance to ground is very tightly controlled. There is generally only a small capacitance margin with compliant USB devices. Addition of a parallel data pathway circuit (comparable to that of bus sampling circuitry 20 of FIG. 1) to a conventional USB device would typically exceed the capacitance limits.